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high accuracy anycap? 200 ma low dropout linear regulator data sheet adp3303 features high a ccuracy o ver l ine and l oad 0.8% at +25 c, 1.4% over t emperature ultralow d ropout v oltage: 180 mv ( t yp ical ) at 200 ma requires o nly c o = 0.47 f for s tability anycap = s table with al l t ypes of c apacitors ( i ncluding mlcc) 3.2 v to 12 v s uppl y r ange current and t hermal l imiting low n oise dropout d etector low s hutdown c urrent: < 1 a thermally e nhanced so ic_n p ackage excellent line and load regulation performance applications cellular t elephones notebook, p almtop c omputers battery p owered s yste ms portable i nstruments post r egulator for s witching s upplies bar c ode s canners functional block dia gram s figure 1 . functional block diagram figure 2 . typical application circuit general description the adp3303 is a member of the adp330x family of preci sion low dropout anycap 1 voltage regulators. the adp3303 stands out from the conventi onal ldos with a different architec ture, an enhanced process , and a different package. its patented design requires only a 0.47 f output capacitor for stability. this device is insensiti ve to ca pacitor equivalent series resis tance (esr) and is stable with any good quality capacitor, in cluding ceramic types (mlcc) for space restricted applications. the adp3303 achieves exception al accuracy of 0.8% at room temperature and 1.4% overall accuracy over temperature, line , and load regulations. the dropout voltage of the adp3303 is only 180 mv (typical) at 200 ma. in additi on to the architecture and process, the analog devices, inc., proprietary thermally enhanced package (thermal coastline) can handle 1 w of power dissipation without external heatsink or large copper surface on the printed circuit board (pcb). this keeps pc b real estate to a minimum and makes the adp3303 very attrac tive for use in portable equipment. the adp3303 operates with a wide inp ut voltage range from 3.2 v to 12 v and delivers a load current in excess of 200 ma. it features an error flag that signals when the device is about to lose regulation or when the short circuit or thermal overload protection is activated. other features in clude shutdown and optional noise reduction capabilities. the adp330x anycap ldo family offers a wide range of output voltages and output current levels: table 1. adp330x anycap ldo family model output current package options adp3300 50 ma 6- lead sot -23 adp3301 100 ma 8- lead soic_n adp3309 100 ma 5- lead sot -23 1 anycap is a trademark of analog devices, inc. q 2 therma l protectio n g m q1 c c bandga p re f drive r r1 r2 ad p 330 3 ou t in err sd gnd 10335-001 adp3303-5. 0 5 4 6 3 nr out in 1 2 7 8 err 330 k e out c 2 0 . 4 7f v ou t = +5 v on off sd c1 0.47f v in sd gnd 10335-002 rev. c document feedback information furnished by analog device s is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without not ice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s. a. tel: 781.329.4700 ? 2014 analog devices, inc. all rights reserved. technical support www.analog.com
adp3303 data sheet table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagrams ............................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 4 thermal resistance ...................................................................... 4 esd caution .................................................................................. 4 pin configuration and function descriptions ............................. 5 typical performance characteristics ............................................. 6 theory of operati on ........................................................................ 9 application information ................................................................ 10 capacitor selection .................................................................... 10 noise reduction ......................................................................... 10 thermal overload protection .................................................. 10 calculating junction temperature ........................................... 10 printed circuit board layout consideration ......................... 10 error flag dropout detector .................................................... 11 shutdown mode ......................................................................... 11 application circuits ....................................................................... 12 crossover switch ........................................................................ 12 higher output current ............................................................. 12 constant dropout post regulator ............................................ 12 outline dimensions ....................................................................... 13 ordering guide .......................................................................... 13 revision history 3/ 14 rev. b to rev. c changed so - 8 package notation to soic_n ........... throughout change s to general description, added table 1 ; renumbered sequentially ....................................................................................... 1 changed figure 1 to figure 1 and figure 2 ; renumbered sequentially ....................................................................................... 1 changes to table 6 ............................................................................ 5 changes to ordering guide ............................................................ 9 11/11 rev. a to rev. b changed t a = ?20c to +85c to t a = ? 25c to + 85 c ............. 2 changed operating ambient temperature range from ? 20 c to + 85 c to ? 25 c to + 85 c ............................................................ 3 changed operating junction temperature range from ?2 0 c to + 85 c to ? 25 c to + 125 c .......................................................... 3 updated outline dimensions .......................................................... 9 changes to ordering guide ............................................................. 9 rev. c | page 2 of 16
data sheet adp3303 specifications t a = ?25c to +85c , v in = 7 v, c in = 0.47 f, c out = 0.47 f, unless otherwise noted . 1 specifications subject to change without notice. table 2. parameter symbol conditions min typ max units output voltage accuracy v out v in = v ou tnom +0.5 v to 12 v i l = 0.1 ma to 200 ma t a = +25c ? 0.8 +0.8 % v in = v outnom +0.5 v to 12 v i l = 0.1 ma to 200 ma C1.4 + 1.4 % line regulation in o v v ? ? l o i v ? ? rev. c | page 3 of 16
adp3303 data sheet absolute maximum rat ings table 3. parameter rating input supply voltage C 0.3 v to +16 v shutdown input voltage C 0.3 v to +16 v error flag o utput voltage C 0.3 v to +16 v noise bypass pin voltage C 0.3 v to + 5 v power dissipation internally limited operating ambient temperature range ?25c to +85c operating junction temperature range ?25c to +125c storage temperature range ?65c to +150 c lead temperature range (soldering 10 sec) +300c vapor phase (60 sec) +215c infrared (15 sec) +220c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operat ion of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance table 4 . thermal resistance package type ja jc unit 8- lead soic_n 96 55 c/w esd caution rev. c | page 4 of 16
data sheet adp3303 pin configuration an d function descripti ons figure 3 . pin configuration table 5 . pin function descriptions pin no. mnemonic description 1, 2 out output of the regulator. bypass to ground with a 0.47 f or larger capacitor. pin 1 and pin 2 must be connected together for proper operation. 3 nr noise reduction pin. used for reduction of the output noise. see the nois e reduction section for details. no connection if not used. 4 gnd ground pin. 5 sd active low shutdown pin. connect to ground to disable the regulator output. when shutdown is not used, connect this pin to the input pin. 6 err open collector output. goes low to indicate that the output is about to go out of regulation. 7, 8 in regulator input. pin 7 and pin 8 mus t be connected together for proper operation. table 6 . other members of anycap f amily 1 model output current package options 2 comments adp3300 50 ma 6 - lead sot - 23 high accuracy adp3301 100 ma 8- lead soic_n high accuracy adp3309 100 ma 5- lead sot -23 improved mic5205 1 see individual data sheets for detailed ordering information. 2 so ic_n = s mall o utline, sot = s urface m ount. out 1 out 2 nr 3 gnd 4 in 8 in 7 err 6 sd 5 adp3303 t op view (not to scale) 10335-003 rev. c | page 5 of 16
adp3303 data sheet typical performance characteristics figure 4 . line regulation: output voltage vs. supply voltage fig ure 5 . output voltage vs. load current figure 6 . quiescent current vs. supply voltage figure 7 . quiescent current vs. load current figure 8 . out put voltage variation % vs. temperature figure 9 . quiescent current vs. temperature input vo lt age (v) output vo lt age (v) 3.3005 3.2985 3.2970 16 4 3.3 5 6 7 8 9 10 1 1 12 13 14 15 3.3000 3.2995 3.2980 3.2975 3.2990 v out = 3.3v i l = 0m a i l = 10m a i l = 200m a i l = 100m a 10335-004 output load (ma) output vo lt age (v) 3.2005 3.1990 3.1975 40 20 0 60 80 100 120 140 160 180 200 3.2000 3.1995 3.1985 3.1980 v in = 7v v out = 3.2v 10335-005 input vo lt age (v) 1.0 0.8 0 16 0 2 4 6 8 12 14 10 0.6 0.4 0.2 v out = 3.3v i l = 0m a ground current (a) 10335-006 output load (ma) ground current (a) 1600 800 200 1400 1200 600 400 1000 i l = 0m a t o 200m a 40 20 0 60 80 100 120 140 160 180 200 10335-007 temper a ture (c) output vo lt age (%) 0.2 ?0.4 135 ?25 ?45 ?5 15 35 95 75 1 15 55 0.1 0 ?0.1 ?0.2 ?0.3 i l = 0m a 10335-008 temper a ture (c) 135 ?25 ?5 15 35 95 75 1 15 55 ground current (a) 2500 2000 0 1500 1000 500 v in = 7v i l = 200m a i l = 0m a 10335-009 rev. c | page 6 of 16
data sheet adp3303 figure 10 . dropout voltage vs. output current figure 11 . power - up/power - down figu re 12 . power - up transient figure 13 . line transient response figure 14 . line transient response figure 15 . load transient for 10 ma to 200 ma pu lse output load (ma) 180 160 0 80 60 40 20 140 100 120 inpu t -output vo lt age (mv) 40 20 0 60 80 100 120 140 160 180 200 10335-010 input vo lt age (v) 5 0 0 3 0 4 3 2 4 2 1 3 2 1 1 inpu t -output vo lt age (v) r l = 16.5 v out = 3.3v 10335-0 1 1 time (s) 0 0 100 120 140 160 180 200 2 v sd = v in or 3v c l = 0 . 4 7f r l = 16 . 5 v out = 3 . 3 v 1 3 4 5 6 7 8 20 inpu t -output vo lt age (v) 40 60 80 v in v out 10335-012 time (s) 0 100 120 140 160 180 200 20 40 60 80 5.0 2 4.9 9 5.0 1 5.0 0 7 . 0 4.9 8 7 . 5 volt age (v) 25, 0.47f load v in v out = 5v 10335-013 time (s) 0 100 120 140 160 180 200 20 40 60 80 5.02 4.99 5.01 5.00 7.0 4.98 7.5 vo lt age (v) 5k, 0.47f load v in v out = 5v 10335-014 volt age (v) time (s) 3.310 3.305 1000 200 0 600 400 800 3.290 200 10 3.300 3.295 v out = 3.3v i (v out ) v out c l = 0.47f 10335-015 rev. c | page 7 of 16
adp3303 data sheet figure 16 . load transient for 10 ma to 200 ma pulse figure 17 . short circuit current figure 18 . turn on figure 19 . turn off figure 20 . power supply ripple rejection figure 21 . output noise density 3.310 3.305 3.290 200 10 3.300 3.295 v out = 3.3v i (v out ) v out c l = 10f time (s) 1000 200 0 600 400 800 (v) (m a) 10335-016 (v) 3.5 0 5 0 4 3 2 1 0 300 100 400 200 3.3v (ma) v out i out v in = 7v time (seconds) 10335-017 time (s) volt age (v) 200 40 0 160 120 80 4 1 0 5 0 3 2 3 c l = 0.47 f , r l = 3.3k 3.3v v out sd v in = 7v c l = 10 f , r l = 3.3k c l = 10 f , r l = 16.5k 10335-018 4 1 25 0 5 10 15 20 3 2 0 0 5 v out v sd c = 0.47f r = 16.5 on 3.3v output volt age (v) time (s) 10335-019 frequenc y (hz) ripple rejection (db) 0 ?100 10m 100 10 1k 10k 100k 1m ?10 ?60 ?70 ?80 ?90 ?20 ?30 ?50 ?40 b a v out = 3.3v a. 0.47 f , r l = 33k b. 0.47 f , r l = 16.5 c. 10 f , r l = 33k d. 10 f , r l = 16.5 b d a c c d 10335-020 frequenc y (hz) vo lt age noise spectra l densit y (v/hz) 10 1 0.01 100k 1k 100 10k 0.1 0.47f by p ass pin 7, 8 t o pin 3 v out = 5 v , c l = 0.47 f , i l = 1ma, c nr = 0 v out = 3.3 v , c l = 0.47 f , i l = 1ma, c nr = 0 v out = 2.7 t o 5 v , c l = 10 f , i l = 1ma, c nr = 10nf 10335-021 rev. c | page 8 of 16
data sheet adp3303 theory of operation the new anycap ldo adp3303 uses a single cont rol loop for regulation and reference functions. the output voltage is sensed by a resistive voltage divider consisting of r1 and r2, which is varied to provide the available output voltage options. feedback is taken from this network by way of a series di ode (d1) and a second resistor divider (r3 and r4) to the input of an amplifier. figure 22 . functional block diagram a very high gain error amplifier is used to control this loop. the amplifier is constructed so that at equilibr ium it produces a large, temperature proportional input offset voltage that is repeatable and very well controlled. the temperature - proportional offset voltage is combined with the complementary diode voltage to form a virtual band gap voltage, implicit in the network, although it never appears explicitly in the circuit. ultimately, this patented design makes it possible to control the loop with only one amplifier. this technique also improves the noise characteristics of the ampli fier by providing more fle xibil ity on the tradeoff of noise sources that leads to a low noise design. the r1, r2 divider is chosen in the same ratio as the band gap voltage to the output voltage. although the r1, r2 resistor divider is loaded by the diode d 1 and a second divider co nsist ing of r3 and r4, the values are chosen to produce a tempera ture stable output. this unique arrangement specifically corrects for the loading of the divider to avoid the error resulting from base current loading in conventional circuits. the patented amplifier controls a new and unique noninverting driver that drives the pass transistor, q1. the use of this special noninverting driver enables the frequency compensation to include the load capacitor in a pole splitting arrangement to achieve reduced sen sitivity to the value, type , and esr of the load capacitance. most ldos place strict requi rements on the range of esr val ues for the output capacitor because they are difficul t to sta bilize due to the uncertainty of load capacitance and resistance. moreove r, the esr value, required to keep conventional ldos stable, changes depending on load and temperature. these esr limitations make designing with ldos more difficult because of their unclear specifications and extreme variations over temperature. this is n ot true with the adp3303 anycap ldo. the adp3303 can be used with virtually any capacitor, with no constraint on the minimum esr. th e innovative design allows the circuit to be stable with just a small 0.47 f capacitor on the output. addi tional advantages of the pole splitting scheme include superior line noise rejection and very high regul ator gain, which leads to excel lent line and load regulation. an impressive 1.4% accuracy is guaranteed over line, load , and temperature. additional features of the circuit include current limit, thermal shutdown , and noise reduction. compared to standard solutions that give warning after the output loses regulation, the adp3303 provides improved system performance by enabling the err p in to give warning before the device loses regulation. as the temperature of the chip r ise s above 165c, the circuit acti vates a soft thermal shutdown, indicated by a signal low on the err p in, to reduce the current to a safe level. to reduce the noise gain of th e loop, the node of the main di vider network (a) is made avail able at the noise reduction (nr) pin, which can be bypassed wi th a small capacitor (10 nf to 100 nf). g m ptat v os r4 r3 d1 r 1 attenuation (v bandgap /v out ) r 2 (a) compensation capacitor noninverting wideband driver q1 i n c load ou t adp330 3 r load pt a t curr e n t gnd 10335-022 rev. c | page 9 of 16
adp3303 data sheet application information capacitor selection output capacitors a s with any micropower device, output transient response is a function of the output cap acitance. the adp3303 is stable with a wide range of capacitor values, types and esr. a capacitor as low as 0.47 f is all that is needed for stability; larger capacitors can be used if high out put current surges are anticipated. the adp3303 is stable with extremely low esr capacitors (esr 0), such as m ultilayer c eramic c apacitors (mlcc) or oscon. input bypass c apacitor a n input bypa ss capacitor is not required. f or applications in which the input source is high imped ance or far from the input pins, use a bypass capacitor. connecting a 0.47 f capacitor from the input pins to ground reduces the sensitivity of the circuit to pcb layout . if a larger value output capacitor is used, then a larger value input capacitor is also recommended. noise reduction a noise reduction capacitor (c nr ) can be used to further reduce the noise by 6 db to 10 db ( see figure 23 ). low leakage capacitors in the 10 nf to 100 nf range provide the best performance. since the noise reduction pin (nr) is internally connected to a high impedance node, any connection to this node must be carefully done to avoid noise pickup fro m external sources. the pad connected to this pin must be as small as possible. long pcb traces are not recommended. figure 23 . noise reduction circuit thermal overload pro tection the adp3303 is protected against damage due to excessive power dissipation by its thermal overload protection circuit, which limits the die temperature to a maximum of 165c. under extreme conditions ( that is, high ambient temperature and powe r dissipation), where die temperature starts to rise above 165c, the output current is reduced until the die temperature drops to a safe level. the output current is restored when the die temperature is reduced. current and thermal limit protections are i ntended to protect the device against accidental overload conditions. for normal operation, device power dissipation must be externally limited so that junction temperatures does not exceed 125c. calculating junction temperature device power dissipation i s calculated as follows: p d = (v in C v out ) i load + (v in ) i gnd w here : i load and i gnd are l oad current and ground current. v in and v out are input and output voltages, respectively. assuming i load = 200 ma, i gnd = 2 ma, v in = 7 v and v out = 5.0 v, device powe r dissipation is: p d = (7 v C 5 v) 200 ma + (7 v) 2 ma = 414 mw the proprietary package used in the adp3303 has a thermal resistance of 96c/w, significantly lower than a standard 8 - lead soic _n package at 170c/w. junction temperature above ambient temperature is ap proximately equal to: 0.414 w 96c/w = 39.7c to limit the maximum junc tion temperature to 125c, maxi mum ambient temperature must be lower than: t ama = 125c C 40c = 85c printed circuit board layout consideration all surface mount packages rely on the traces of the pc b to conduct heat away from the package. in standard packages, the dominant component of the heat resistance path is the plastic between the die attach pad and the in dividual leads. in typical thermally enhanced packages, one or more of the leads are fused to the die attach pad, significantly decreasing this componen t. to make the improvement mean ingful, however, a significant copper area on the pcb must be attached to these fused pins. the patented thermal coastline lead frame design of the adp3303 ( see figure 24 ) uniformly minimizes the value of the dominant portion of the thermal resistance. it ensures that heat is conducted away by all pins of the package. this yields a very low, 96c/w, thermal resistance for an so ic_n package, without any special board layout requirements, relying on the normal traces connected to the leads. the thermal resistance can be decreased approximately an additional 10% by attaching a few square cm of copper area to the in pin of the adp3303 . do not use solder mask or silkscreen on the pcb tra ces adjacent to the pins of the adp3303 since it increase s the junction to ambient thermal resistance of the package. in ou t er r gn d adp3303-5. 0 n r + 6 7 8 1 2 3 4 5 on of f + sd c n r 10 n f c2 10f r 1 330 k e out c1 1f v ou t = 5 v v in sd 10335-023 rev. c | page 10 of 16
data sheet adp3303 figure 24 . thermal coastline error flag dropout d etector the adp3303 maintain s its output voltage over a wide range of load, input voltage and temperature conditions. if, for example, the output is about to lose regulation by reducing the supp ly voltage below the combined regulated output and drop - out voltages, the err flag is activated. the err output is an open collector, which is driven low. once set, the hysteresis of the err flag keep s the output low until a small margin of operating range is restored either by raising the supply voltage or reducing the load. shutdown mode applying a ttl high signal to the shutdown ( sd ) pin, or tying it to the input pin, turn s the outpu t on . pulling sd down to 0.3 v or below, o r tying it to ground, turn s the output off . in shutdown mode, quiescent current is reduced to much less than 1 a. copper paddle 1 2 3 4 8 7 6 5 copper lead-frame 10335-024 rev. c | page 11 of 16
adp3303 data sheet application circuits crossover switch the circuit in figure 25 shows that two adp3303 s can be used to form a mixed supply voltage system. the output switches between two different levels selected by an external digital input. output voltages can be any combination of voltages from the ordering guide . figure 25 . crossover switch higher output curren t the adp3303 can source up to 200 m a without any heatsink or pass transistor. if higher current is needed, an appropriate pass transistor can be used, as in figure 26 , to increase the output current to 1 a. figure 26 . high output current linear regulator constant dropout pos t r e gulator the circuit in figure 27 provides high precision with low drop - out for any regulated output voltage. it significantly reduces the ripple from a switching regulator while providing a constant dropout voltage, which limits the power dissipation of the ldo to 60 mw. the adp3000 used in this circuit is a switching regulator in the step - up configuration. figure 27 . constant dropout post regulator adp3303-5. 0 ou t in gn d output selec t 5v 0v c1 1.0f adp3303-3. 3 ou t in gn d c2 0.47f v ou t = 5 v/ 3 . 3 v v i n = 5.5v to 12 v s d s d 10335-025 v in = 6v to 8v v ou t = 5v at 1 a mje253 * c 2 1 0f c 1 4 7f r 1 5 0 *aav i d531002 hea t s in k i s use d in out err gnd s d ad p 3303 - 5 10335-026 d 1 1n581 7 c 2 10 0f 10 v l 1 6 . 8h r1 120 adp3303-3. 3 in sd ou t gn d c 3 2. 2f 3.3v at 160m a c 1 10 0f 10 v adp3000-ad j i li m v in sw1 gnd sw2 fb v i n = 2.5v to 3.5 v r 2 30.1 k 1 % q 1 2n390 6 q 2 2n390 6 r 4 274 k r 3 124 k 1 % 10335-027 + rev. c | page 12 of 16
data sheet adp3303 outline dimensions figure 28 . 8 - lead standard small outline package [soic_n] narrow body (r - 8) dimensions shown in millimeters and (inches) ordering guide model 1 temperature rang e output voltage (v) package description package option adp 3303 ar - 3 - reel ? 40 c to +85c 3 8 - lead soic_n r - 8 adp3303ar -3.2- reel ? 40 c to +85c 3.2 8- lead soic_n r -8 adp3303 arz -3.3 40c to +85c 3.3 8- lead soic_n r -8 adp3303 arz -3.3-rl 7 40c to +85c 3.3 8- lead soic_n r -8 adp3303 arz -3.3 reel 40c to +85c 3.3 8- lead soic_n r -8 adp3303 arz -5 40c to +85c 5 8- lead soic_n r -8 adp 3303 arz - 5 - reel 40c to +85c 5 8 - lead soic_n r - 8 1 z = rohs compli ant part. controlling dimens ions are in millimeters; inch dimensions (in p arentheses) are rounded-off millimeter equiv alents for reference onl y and are not appropria te for use in design. compl iant t o jedec st andards ms-012-aa 012407- a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0 157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) sea ting plane 0.25 (0.0098 ) 0.10 (0.0040) 4 1 8 5 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 rev. c | page 13 of 16
adp3303 data sheet notes rev. c | page 14 of 16
data sheet adp3303 notes rev. c | page 15 of 16
adp3303 data sheet notes ? 2014 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d10335 - 0 - 3/14(c) rev. c | page 16 of 16

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